test

diff --git a/lcd.ucf b/lcd.ucf
index fe142f98d0fc2980338ed5f7fd031b530083c25b..998a6e2311ab59f6bf2f10983284e72f7d60609f 100644 (file)
--- a/lcd.ucf
+++ b/lcd.ucf
@@ -1,52 +1,52 @@
 //50Mhz clock
 NET "clkpin" LOC = "E12"| IOSTANDARD = LVCMOS33 ;
 
-NET "LED<2>" LOC = "U20" | IOSTANDARD = LVTTL | SLEW = QUIETIO | DRIVE = 4 ;
+//NET "LED<2>" LOC = "U20" | IOSTANDARD = LVTTL | SLEW = QUIETIO | DRIVE = 4 ;
+//NET "LED<1>" LOC = "T19" | IOSTANDARD = LVTTL | SLEW = QUIETIO | DRIVE = 4 ;
 NET "LED<0>" LOC = "R20" | IOSTANDARD = LVTTL | SLEW = QUIETIO | DRIVE = 4 ;
-NET "LED<1>" LOC = "T19" | IOSTANDARD = LVTTL | SLEW = QUIETIO | DRIVE = 4 ;
 
-NET "BUTTON" LOC = "T14" | IOSTANDARD = LVTTL | PULLDOWN ;
+//NET "BUTTON" LOC = "T14" | IOSTANDARD = LVTTL | PULLDOWN ;
 
-NET "RL" LOC = "A13" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "TB" LOC = "B13" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "RL" LOC = "A13" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "TB" LOC = "B13" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
 
 /* LCD Input control */
-NET "dclk" LOC = "A14" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "vsync" LOC = "B15" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "hsync" LOC = "A15" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "de" LOC = "A16" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "dclk" LOC = "A14" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "vsync" LOC = "B15" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "hsync" LOC = "A15" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "de" LOC = "A16" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
 
 /* Data red */
-NET "tft_r_pins<7>" LOC = "A17" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_r_pins<6>" LOC = "B17" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_r_pins<5>" LOC = "A18" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_r_pins<4>" LOC = "C18" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_r_pins<3>" LOC = "A19" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_r_pins<2>" LOC = "B19" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_r_pins<1>" LOC = "A20" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_r_pins<0>" LOC = "B20" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_r_pins<7>" LOC = "A17" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_r_pins<6>" LOC = "B17" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_r_pins<5>" LOC = "A18" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_r_pins<4>" LOC = "C18" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_r_pins<3>" LOC = "A19" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_r_pins<2>" LOC = "B19" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_r_pins<1>" LOC = "A20" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_r_pins<0>" LOC = "B20" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
 
 
 /* Data green */
-NET "tft_g_pins<7>" LOC = "D19" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_g_pins<6>" LOC = "D18" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_g_pins<5>" LOC = "E17" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_g_pins<4>" LOC = "D20" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_g_pins<3>" LOC = "D21" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_g_pins<2>" LOC = "D22" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_g_pins<1>" LOC = "E22" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_g_pins<0>" LOC = "F18" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_g_pins<7>" LOC = "D19" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_g_pins<6>" LOC = "D18" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_g_pins<5>" LOC = "E17" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_g_pins<4>" LOC = "D20" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_g_pins<3>" LOC = "D21" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_g_pins<2>" LOC = "D22" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_g_pins<1>" LOC = "E22" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_g_pins<0>" LOC = "F18" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
 
 
 /* Data blue */
-NET "tft_b_pins<7>" LOC = "F20" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_b_pins<6>" LOC = "E20" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_b_pins<5>" LOC = "G20" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_b_pins<4>" LOC = "G19" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_b_pins<3>" LOC = "H19" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_b_pins<2>" LOC = "J18" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_b_pins<1>" LOC = "K18" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
-NET "tft_b_pins<0>" LOC = "K17" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_b_pins<7>" LOC = "F20" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_b_pins<6>" LOC = "E20" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_b_pins<5>" LOC = "G20" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_b_pins<4>" LOC = "G19" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_b_pins<3>" LOC = "H19" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_b_pins<2>" LOC = "J18" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_b_pins<1>" LOC = "K18" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "tft_b_pins<0>" LOC = "K17" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
 
 /* serial port */
 NET "SDI" LOC = "K19" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
@@ -54,4 +54,4 @@ NET "SDO" LOC = "M20" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
 NET "SCL" LOC = "K20" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
 NET "CS" LOC = "L19" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
 
-NET "RESET" LOC = "L18" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
+//NET "RESET" LOC = "L18" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;

diff --git a/testlcd.xise b/testlcd.xise
index 4fec7845a384945da835ba60834de51d52d13131..1656977f61502d61dfa5e44d9ebe6c465f1295a3 100644 (file)
--- a/testlcd.xise
+++ b/testlcd.xise
@@ -15,25 +15,13 @@
   <version xil_pn:ise_version="14.7" xil_pn:schema_version="2"/>
 
   <files>
-    <file xil_pn:name="lcd.v" xil_pn:type="FILE_VERILOG">
-      <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="3"/>
-      <association xil_pn:name="Implementation" xil_pn:seqID="0"/>
-    </file>
     <file xil_pn:name="ipcore_dir/dcm.xaw" xil_pn:type="FILE_XAW">
       <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="64"/>
       <association xil_pn:name="Implementation" xil_pn:seqID="0"/>
     </file>
-    <file xil_pn:name="clocks.v" xil_pn:type="FILE_VERILOG">
-      <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="65"/>
-      <association xil_pn:name="Implementation" xil_pn:seqID="2"/>
-    </file>
-    <file xil_pn:name="spi.v" xil_pn:type="FILE_VERILOG">
-      <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="66"/>
-      <association xil_pn:name="Implementation" xil_pn:seqID="1"/>
-    </file>
     <file xil_pn:name="top.v" xil_pn:type="FILE_VERILOG">
       <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="67"/>
-      <association xil_pn:name="Implementation" xil_pn:seqID="3"/>
+      <association xil_pn:name="Implementation" xil_pn:seqID="1"/>
     </file>
     <file xil_pn:name="lcd.ucf" xil_pn:type="FILE_UCF">
       <association xil_pn:name="Implementation" xil_pn:seqID="0"/>

diff --git a/top.v b/top.v
index 5beff1d6fb30538fa97b2ddcc5776a9c19fbeab2..d5d3b4a551bf5bdf5014da42edbd554805c846c0 100644 (file)
--- a/top.v
+++ b/top.v
@@ -1,253 +1,26 @@
 module top(
-  clkpin,
-  button,
   led,
+  clkpin,
   sdi,
        sdo,
        scl,
        cs,
-       reset,
-       rl,
-       tb,
-       tft_r_pins,
-       tft_g_pins,
-       tft_b_pins,
-       de,
-       dclk,
-       hsync,
-       vsync
 );
 
+output [0:0]led;
 input clkpin;
-input button;
-output [3:0] led;
 output sdi;
 input sdo;
 output scl;
 output cs;
-output reg reset = 0;
-output rl;
-output tb;
-output reg [7:0]tft_r_pins;
-output reg [7:0]tft_g_pins;
-output reg [7:0]tft_b_pins;
-output de;
-output dclk;
-output hsync;
-output vsync;
-
-assign rl = 0;
-assign tb = 0;
-assign de = 0;
-
-wire clk;    // 300MHz
-wire spiclk; // 20MHz
-wire tftclk; // 6.667MHz
-wire clk50;
-
-clocks clocks_instance(
-  .clkpin(clkpin),
-  .rst(1'b0),
-  .clk50(clk50),
-  .clk(clk),
-  .spiclk(spiclk),
-  .tftclk(tftclk)
-);
-
-reg [8:0] counter = 0;
-wire [23:0] spi_in;
-wire [23:0] spi_out;
-reg spi_r = 0;
-reg spi_s = 0;
-wire spi_done;
-
-assign led[0] = ~scl;
-assign led[1] = ~cs;
-assign led[2] = ~sdo;
-assign led[3] = ~spi_done;
-
-master_spi #(
-  .WIDTH(24)
-)
-master_spi_instance(
-  .clk(spiclk),
-       .sclk(scl),
-  .mosi(sdi),
-  .miso(sdo),
-  .ssel(cs),
-  .din(spi_in),
-  .dout(spi_out),
-  .done(spi_done),
-  .r(spi_r),
-  .s(spi_s)
-);
-
-reg [1:0] state = 0;
-reg [5:0] index = 0;
-
-reg [23:0] init_sequence [0:45];
-
-initial begin
-  init_sequence[ 0] = 24'h700001;
-  init_sequence[ 1] = 24'h726300;
-  init_sequence[ 2] = 24'h700002;
-  init_sequence[ 3] = 24'h720200;
-  init_sequence[ 4] = 24'h700003;
-  init_sequence[ 5] = 24'h726064;
-  init_sequence[ 6] = 24'h700004;
-  init_sequence[ 7] = 24'h720447;
-  init_sequence[ 8] = 24'h700005;
-  init_sequence[ 9] = 24'h72b084;
-  init_sequence[10] = 24'h70000a;
-  init_sequence[11] = 24'h724008;
-  init_sequence[12] = 24'h70000b;
-  init_sequence[13] = 24'h72d400;
-  init_sequence[14] = 24'h70000d;
-  init_sequence[15] = 24'h72423d;
-  init_sequence[16] = 24'h70000e;
-  init_sequence[17] = 24'h723140;
-  init_sequence[18] = 24'h70000f;
-  init_sequence[19] = 24'h720000;
-  init_sequence[20] = 24'h700016;
-  init_sequence[21] = 24'h729f80;
-  init_sequence[22] = 24'h700017;
-  init_sequence[23] = 24'h722212;
-  init_sequence[24] = 24'h70001e;
-  init_sequence[25] = 24'h7200db;
-  init_sequence[26] = 24'h700030;
-  init_sequence[27] = 24'h720000;
-  init_sequence[28] = 24'h700031;
-  init_sequence[29] = 24'h720607;
-  init_sequence[30] = 24'h700032;
-  init_sequence[31] = 24'h720006;
-  init_sequence[32] = 24'h700033;
-  init_sequence[33] = 24'h720307;
-  init_sequence[34] = 24'h700034;
-  init_sequence[35] = 24'h720107;
-  init_sequence[36] = 24'h700035;
-  init_sequence[37] = 24'h720001;
-  init_sequence[38] = 24'h700036;
-  init_sequence[39] = 24'h720707;
-  init_sequence[40] = 24'h700037;
-  init_sequence[41] = 24'h720703;
-  init_sequence[42] = 24'h70003a;
-  init_sequence[43] = 24'h720c00;
-  init_sequence[44] = 24'h70003b;
-  init_sequence[45] = 24'h720006;
-end
-
-assign spi_in = init_sequence[index];
-
-`define STATE_PULSE_WIDTH 0
-`define STATE_BACK_PORCH  1
-`define STATE_DISPLAY     2
-`define STATE_FRONT_PORCH 3
-
-`define V_PULSE_WIDTH     2
-`define V_BACK_PORCH     16
-`define V_DISPLAY       240
-`define V_FRONT_PORCH     4
-
-`define H_PULSE_WIDTH     2
-`define H_BACK_PORCH     66
-`define H_DISPLAY       320
-`define H_FRONT_PORCH    20
-
-reg [1:0] vstate = `STATE_PULSE_WIDTH;
-reg [1:0] hstate = `STATE_PULSE_WIDTH;
-reg [8:0] vcounter = `V_PULSE_WIDTH;
-reg [8:0] hcounter = `H_PULSE_WIDTH;
-
-reg screen_enabled = 0;
-
-ODDR2 #(.DDR_ALIGNMENT("NONE"), .INIT(1'b0), .SRTYPE("SYNC"))
-oddr2_tft_clk(
-       .Q(dclk),
-       .C0(tftclk),
-       .C1(~tftclk),
-       .CE(screen_enabled),
-       .D0(1'b1),
-       .D1(1'b0),
-       .R(1'b0),
-       .S(1'b0));
-
-always @(posedge clk50) begin
-  if (counter == 500) begin
-    screen_enabled <= 1;
-               reset <= 1;
-  end else begin
-    counter <= counter + 1;
-  end
-end
-
-reg [1:0] screen_state = 0;
-
-always @(posedge spiclk) begin
-  case(state)
-    0: if (screen_state == 2'b01) begin state <= 1; index <= 0; end
-    1: begin state <= 2; spi_r <= 1; spi_s <= 0; end
-    2: begin state <= 3; spi_r <= 0; spi_s <= 1; end
-    3: begin
-      spi_s <= 0;
-      if (spi_done) begin
-        state <= index == 45 ? 0 : 1;
-        index <= index + 1;
-      end
-    end
-  endcase
-  screen_state <= { screen_state[0], screen_enabled };
-end
-
-//assign de = vstate == `STATE_DISPLAY && hstate == `STATE_DISPLAY;
-assign hsync = hstate == `STATE_PULSE_WIDTH;
-assign vsync = vstate == `STATE_PULSE_WIDTH;
-
-reg [4:0] frame_counter = 0;
 
-always @(posedge tftclk) begin
-  if (screen_enabled) begin
-               if (hcounter == 0 
-                       && vcounter == 0 
-                       && vstate == `STATE_FRONT_PORCH 
-                       && hstate == `STATE_FRONT_PORCH 
-                       && frame_counter != 11) 
-                       frame_counter <= frame_counter + 1;
-    if (hcounter == 0) begin
-      hstate = hstate + 1;
-      case(hstate)
-        `STATE_PULSE_WIDTH: begin
-          hcounter <= `H_PULSE_WIDTH;
-          if (vcounter == 0) begin
-            vstate = vstate + 1;
-            case(vstate)
-              `STATE_PULSE_WIDTH: vcounter <= `V_PULSE_WIDTH;
-              `STATE_BACK_PORCH:  vcounter <= `V_BACK_PORCH;
-              `STATE_DISPLAY:     vcounter <= `V_DISPLAY;
-              `STATE_FRONT_PORCH: vcounter <= `V_FRONT_PORCH;
-            endcase
-          end else vcounter <= vcounter - 1;
-        end
-        `STATE_BACK_PORCH:  hcounter <= `H_BACK_PORCH;
-        `STATE_DISPLAY:     hcounter <= `H_DISPLAY;
-        `STATE_FRONT_PORCH: hcounter <= `H_FRONT_PORCH;
-      endcase
-    end else hcounter <= hcounter - 1;
-  end
-end
+reg [31:0] counter = 0;
 
-reg[7:0] pixel_counter = 0;
-always @(posedge tftclk) begin
-  pixel_counter <= pixel_counter + 1;
-  if (frame_counter == 11) begin
-    tft_r_pins <= pixel_counter;
-    tft_g_pins <= pixel_counter;
-    tft_b_pins <= pixel_counter;
-  end else begin
-    tft_r_pins <= 0;
-    tft_g_pins <= 0;
-    tft_b_pins <= 0;
-  end
-end
+always @(posedge clkpin) counter <= counter + 1;
 
+assign led = counter[25];
+assign scl = counter[1];
+assign sdi = sdo;
+assign cs = counter[8];
 
 endmodule